1. Field of the Invention
The present invention relates to the field of semiconductor integrated circuit (IC) manufacturing, and more specifically, to a method of bonding wafers using highly compliant plates, as well as, a bonded-wafer structure having copper contacts with variable heights.
2. Discussion of Related Art
In 1965, Gordon Moore first observed that the maximum number of devices per area on a chip was doubling every 18 months. Over the four decades since Moore's Law was first stated, the semiconductor industry has successfully introduced new processes and designs to maintain such a rate of increasing device density. In particular, continual enhancements in photolithography have reduced the minimum critical dimension (CD) that may be successfully patterned for a feature on the devices on the chip. Furthermore, major developments in doping, deposition, and etch have allowed a greater precision in controlling concentration, depth, and thickness across the chip.
As the smallest CD that may be achieved for the feature has been inexorably decreased, the fundamental limitations of physics will inevitably slow down the speed and increase the power consumption of the devices on the chip. Important goals include shortening signal path length and reducing resistance-capacitance (RC) delay.
Previously, scaling has predominantly involved a shrinking of the local interconnection within the chip. In the future, it will become even more critical to shrink the global interconnection between chips. An approach being taken is to bond wafers together, such as face-to-face. However, the copper contacts on the wafers may have variable heights. In one case, taller contacts may bond while shorter contacts may remain separated by voids. In another case, shorter contacts may bond, but taller contacts may be damaged.
Thus, what is needed is a method of bonding wafers such that the copper contacts will bond despite variable heights.